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| data sheet 8-bit single-chip microcontrollers mos integrated circuits pd78F9116B, 78F9116B(a) document no. u15929ej1v0ds00 (1st edition) date published april 2002 n cp(k) printed in japan ? 2002 description the pd78F9116B is a pd789114a subseries product of the 78k/0s series. the pd78F9116B replaces the internal rom of the pd789111a,789112a and 789114a with flash memory, which enables the writing/erasing of a program while the device is mounted on the board. a stricter quality assurance program (called special grade in nec?s grade classification) is applied to the pd78F9116B(a), compared to the pd78F9116B, which are classified as standard grade. because flash memory allows the program to be written and erased electrically with the device mounted on the board, this product is ideal for the evaluation stages of system development, small-scale production, and rapid development of new products. detailed function descriptions are provided in the following user?s manuals. be sure to read them before designing. pd789104a, 789114a, 789124a, 789134a subseries user?s manual: u14643e 78k/0s series user?s manual instruction: u11047e features ? pin-compatible with mask rom version (excluding v pp pin) ? flash memory: 16 kb ? internal high-speed ram: 256 bytes ? on-chip multiplier: 8 bits 8 bits = 16 bits ? minimum instruction execution time can be changed from high-speed (0.2 s) to low-speed (0.8 s) (@ 10.0 mhz operation with system clock, v dd = 4.5 to 5.5 v) ? i/o ports: 20 ? serial interface: 1 channel: switchable between 3-wire serial i/o and uart modes ? 10-bit resolution a/d converter: 4 channels ? timers: 3 channels ? 16-bit timer: 1 channel ? 8-bit timer/event counter: 1 channel ? watchdog timer: 1 channel ? power supply voltage: v dd = 1.8 to 5.5 v applications cleaners, washing machines, refrigerators and battery-charger the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all devices/types available in every country. please check with local nec representative for availability and additional information.
data sheet u15929ej1v0ds 2 pd78F9116B, 78F9116B(a) ordering information part number package quality grade pd78F9116Bmc-5a4 30-pin plastic ssop (7.62 mm (300)) standard pd78F9116Bmc(a)-5a4 30-pin plastic ssop (7.62 mm (300)) special please refer to "quality grades on nec semiconductor devices" (document no. c11531e) published by nec corporation to know the specification of quality grade on the devices and its recommended applications. data sheet u15929ej1vds 3 pd78F9116B, 78F9116B(a) 78k/0s series lineup the products in the 78k/0s series are listed below. the names enclosed in boxes are subseries names. 52-pin sio + resistance division method lcd (24 4) 8-bit a/d + internal voltage boosting method lcd (23 4) pd789327 lcd drive 80-pin 80-pin pd789436 pd789446 pd789426 pd789456 pd789417a pd789407a pd789316 pd789467 pd789306 pd789426 with 10-bit a/d pd789446 with 10-bit a/d sio + 8-bit a/d + resistance division method lcd (28 4) sio + 8-bit a/d + internal voltage boosting method lcd (15 4) pd789407a with 10-bit a/d sio + 8-bit a/d + internal voltage boosting method lcd (5 4) rc oscillation version of pd789306 sio + internal voltage boosting method lcd (24 4) 64-pin 64-pin 52-pin 64-pin 64-pin 64-pin sio + 10-bit a/d + internal voltage boosting method lcd (28 4) 80-pin sio + 8-bit a/d + resistance division method lcd (28 4) 80-pin pd789478 pd789860 64-pin products under development products in mass production small-scale package, general-purpose applications 78k/0s series pd789014 with enhanced timer function and expanded rom and ram on-chip uart and capable of low-voltage (1.8 v) operation rc oscillation version of pd789052 pd789074 with subsystem clock added inverter control 44-pin pd789842 on-chip inverter controller and uart pd789146 pd789156 44-pin small-scale package, general-purpose applications and a/d function 44-pin 30-pin 30-pin 30-pin 30-pin pd789124a pd789134a pd789177 pd789167 30-pin 30-pin pd789104a pd789114a pd789167 with 10-bit a/d pd789104a with enhanced timer pd789124a with 10-bit a/d rc oscillation v ersion of pd789104a pd789104a with 10-bit a/d pd789026 with 8-bit a/d and m ultiplier added pd789104a with eepr om added pd789146 with 10-bit a/d pd789177y pd789167y y subseries supports smb. usb 88-pin pd789861 pd789862 144-pin uart + dot lcd (40 16) uart + 8-bit a/d + dot lcd (total display outputs: 96) 42-/44-pin 44-pin 30-pin pd789026 with enhanced timer function vfd drive 52-pin 64-pin pd789871 on-chip vfd controller (total display outputs: 25) meter control pd789881 uart + resistance division method lcd (26 4) 30-pin 28-pin 20-pin 20-pin pd789074 with enhanced timer function and expanded rom and ram 44-pin pd789800 pd789803 64-pin for pc keyboard. on-chip usb function for pc keyboard. on-chip usb hub function keyless entry 20-pin 20-pin 30-pin on-chip poc and key return circuit on-chip bus controller 30-pin pd789850 on-chip can controller pd789074 pd789088 pd789062 pd789014 pd789046 pd789026 pd789052 pd789488 pd789830 pd789835 pd789860 without eeprom tm , poc, and lvi pd789860 with enhanced timer function, added sio, and expanded rom and ram rc oscillation version of pd789860 remark vfd (vacuum fluorescent display) is referred to as fip tm (fluorescent indicator panel) in some documents, but the functions of the two are the same. data sheet u15929ej1v0ds 4 pd78F9116B, 78F9116B(a) the major functional differences among the subseries are listed below. series for general-purpose and lcd drive timer v dd function subseries name rom capacity (bytes) 8-bit 16-bit watch wdt 8-bit a/d 10-bit a/d serial interface i/o min.value remarks pd789046 16 k 1 ch pd789026 4 k to 16 k 1 ch 34 pd789088 16 k to 32 k 3 ch pd789074 2 k to 8 k 1 ch 1 ch 24 small- scale package, general- purpose applica- tions pd789014 2 k to 4 k 2 ch ? ? 1 ch ?? 1 ch (uart: 1ch) 22 1.8 v ? pd789062 ? 14 rc-oscillation version pd789052 4 k ? pd789177 ? 8 ch pd789167 16 k to 24 k 3 ch 1 ch 8 ch ? 31 ? pd789156 ? 4 ch pd789146 8 k to 16 k 4 ch ? on-chip eeprom pd789134a ? 4 ch pd789124a 4 ch ? rc-oscillation version pd789114a ? 4 ch small- scale package, general- purpose applica- tions + a/d converter pd789104a 2 k to 8 k 1 ch 1 ch ? 1ch 4 ch ? 1 ch (uart: 1ch) 20 1.8 v ? pd789835 24 k to 60 k 6 ch ? 3 ch 37 1.8 v note pd789830 24 k 1 ch ? 1 ch (uart: 1ch) 30 2.7 v dot lcd supported pd789488 32 k ? 8 ch pd789478 24 k to 32 k 8 ch ? 2 ch (uart: 1ch) 45 pd789417a ? 7 ch lcd drive pd789407a 12 k to 24 k 3 ch 1 ch 1 ch 1 ch 7 ch ? 1 ch (uart: 1ch) 43 1.8 v ? pd789456 ? 6 ch pd789446 6 ch ? 30 pd789436 ? 6 ch pd789426 12 k to 16 k 6 ch 40 pd789316 rc-oscillation version pd789306 8 k to 16 k ? 2 ch (uart: 1ch) 23 pd789467 1 ch ? 18 pd789327 4 k to 24 k 2 ch ? ? ? 1 ch 21 ? note flash memory version: 3.0 v data sheet u15929ej1vds 5 pd78F9116B, 78F9116B(a) series for assp timer v dd function subseries name rom capacity (bytes) 8-bit 16-bit watch wdt 8-bit a/d 10-bit a/d serial interface i/o min.value remarks pd789803 8 k to 16 k 41 3.6 v usb pd789800 8 k 2 ch ?? 1 ch ?? 2 ch (usb: 1 ch) 31 4.0 v ? inverter control pd789842 8 k to 16 k 3 ch note 1 1 ch 1 ch 8 ch ? 1 ch (uart: 1 ch) 30 4.0 v ? on-chip bus controller pd789850 16 k 1 ch 1 ch ? 1 ch 4 ch ? 2 ch (uart: 1 ch) 18 4.0 v ? pd789861 1.8 v rc-oscillation version, on-chip eeprom keyless entry pd789860 4 k 2 ch ?? 1 ch ?? ? 14 on-chip eeprom pd789862 16 k 1 ch 2 ch 1 ch (uart: 1 ch) 22 vfd drive pd789871 4 k to 8 k 3 ch ? 1 ch 1 ch ?? 1 ch 33 2.7 v ? meter control pd789881 16 k 2 ch 1 ch ? 1 ch ?? 1 ch (uart: 1 ch) 28 2.7 v note 2 ? notes 1. 10-bit timer: 1 channel 2. flash memory version: 3.0 v data sheet u15929ej1v0ds 6 pd78F9116B, 78F9116B(a) overview of functions item function flash memory 16 kb internal memory high-speed ram 256 bytes minimum instruction execution time 0.2/0.8 s (@ 10.0 mhz operation with system clock, v dd = 4.5 to 5.5 v) general-purpose registers 8 bits 8 registers instruction set ? 16-bit operations ? bit manipulations (set, reset, and test) multiplier 8 bits 8 bits = 16 bits i/o ports total: 20 ? cmos input: 4 ? cmos i/o: 12 ? n-ch open-drain (12 v withstand voltage): 4 a/d converters 10-bit resolution 4 channels serial interface switchable between 3-wire serial i/o and uart modes timer ? 16-bit timer: 1 channel ? 8-bit timer/event counter: 1 channel ? watchdog timer: 1 channel timer output 1 output (16-bit/8-bit timer alternate function) maskable internal: 6, external: 3 vectored interrupt sources non-maskable internal: 1 power supply voltage v dd = 1.8 to 5.5 v operating ambient temperature t a = ?40 to + 85c package 30-pin plastic ssop (7.62 mm (300)) data sheet u15929ej1vds 7 pd78F9116B, 78F9116B(a) contents 1. pin configuration (top view) .............................................................................................. 8 2. block diagram............................................................................................................... ............. 9 3. differences between pd78F9116B, 78F9116B(a), and mask rom versions ............ 10 4. pin functions ............................................................................................................... ................ 11 4.1 port pins................................................................................................................... ............................... 11 4.2 non-port pins............................................................................................................... ........................... 12 4.3 pin i/o circuits and recommended connection of unused pins...................................................... 13 5. memory space ................................................................................................................ ............. 15 6. flash memory characteristics ........................................................................................... 16 6.1 programming environment ..................................................................................................... .............. 16 6.2 communication mode .......................................................................................................... .................. 17 6.3 on-board pin processing ..................................................................................................... ................. 20 6.4 connection when using flash memory writing adapter ................................................................... 23 7. instruction set overview ................................................................................................... .. 26 7.1 conventions................................................................................................................. ........................... 26 7.2 operations.................................................................................................................. ............................. 28 8. electrical specifications................................................................................................... .. 33 9. package drawing ............................................................................................................. ......... 45 10. recommended soldering conditions............................................................................... 46 appendix a. development tools.............................................................................................. 47 appendix b. related documents ............................................................................................. 4 9 data sheet u15929ej1v0ds 8 pd78F9116B, 78F9116B(a) 1. pin configuration (top view) ? 30-pin plastic ssop (7.62 mm (300)) pd78F9116Bmc-5a4 pd78F9116Bmc(a)-5a4 p23/intp0/cpt20/ss20 p24/intp1/to80/to20 p25/intp2/ti80 av dd p60/ani0 p61/ani1 p62/ani2 p63/ani3 av ss p50 ic0 p51 p52 p53 p00 28 27 26 30 29 25 24 23 22 21 20 19 18 16 p22/si20/r x d20 p21/so20/t x d20 p20/sck20/asck20 p11 p10 v dd v ss x1 x2 v pp ic0 reset p03 p02 p01 1 2 3 4 5 6 7 8 9 10 11 12 13 17 14 15 cautions 1. connect the ic0 (internally connected) pin directly to v ss . 2. connect the v pp pin directly to v ss in normal operation mode. 3. connect the av dd pin to v dd . 4. connect the av ss pin to v ss . ani0 to ani3: analog input reset: reset asck20: asynchronous serial input r x d20: receive data av dd : analog power supply sck20: serial clock input/output av ss : analog ground si20: serial data input cpt20: capture trigger input so20: serial data output ic0: internally connected ss20: chip select input intp0 to intp2: interrupt from peripherals ti80: timer input p00 to p03: port0 to20, to80: timer output p10, p11: port1 t x d20: transmit data p20 to p25: port2 v dd : power supply p50 to p53: port5 v pp : programming power supply p60 to p63: port6 v ss : ground x1, x2: crystal 1, 2 data sheet u15929ej1vds 9 pd78F9116B, 78F9116B(a) 2. block diagram 78k/0s cpu core flash memory ram v dd v ss ic0 ti80/intp2/p25 8-bit timer/ event counter 80 to80/to20 /intp1/p24 p00 to p03 port 0 p10, p11 port 1 p20 to p25 port 2 p50 to p53 port 5 p60 to p63 port 6 system control to20/to80 /intp1/p24 cpt20/intp0 /ss20/p23 16-bit timer 20 watchdog timer serial interface 20 sck20/asck20 /p20 si20/rxd20/p22 so20/txd20/p21 ss20/intp0 /cpt20/p23 a/d converter ani0/p60 to ani3/p63 av dd av ss reset x1 x2 interrupt control intp0/cpt20 /p23/ss20 intp1/to80 /to20/p24 intp2/ti80/p25 v pp data sheet u15929ej1v0ds 10 pd78F9116B, 78F9116B(a) 3. differences between pd78F9116B, 78F9116B(a), and mask rom versions the pd78F9116B and 78F9116B(a) are products in which flash memory is substituted for the internal rom of the mask rom version. the differences between the pd78F9116B, 78F9116B(a), and the mask rom versions are shown in table 3-1. table 3-1. differences between pd78F9116B, 78F9116B(a), and mask rom versions flash memory version mask rom version item pd78F9116B pd78F9116B(a) pd789111a pd789111a(a) pd789112a pd789112a(a) pd789114a pd789114a(a) rom 16 kb (flash memory) 2 kb 4 kb 8 kb internal memory high-speed ram 256 bytes pull-up resistor 12 (software control only) 16 (software control: 12, mask option specification: 4) v pp pin provided not provided electric characteristics see the relevant data sheet caution there are differences in noise immunity and noise radiation between the flash memory and mask rom versions. when pre-producing an application set with the flash memory version and then mass-producing it with the mask rom version, be sure to conduct sufficient evaluations for the commercial samples (not engineering samples) of the mask rom version. data sheet u15929ej1vds 11 pd78F9116B, 78F9116B(a) 4. pin functions 4.1 port pins pin name i/o function after reset alternate function p00 to p03 i/o port 0 4-bit i/o port input/output can be specified in 1-bit units when used as an input port, connection of an on-chip pull-up resistor can be specified by software. input ? p10, p11 i/o port 1 2-bit i/o port input/output can be specified in 1-bit units when used as an input port, an connection of on-chip pull-up resistor can be specified by software. input ? p20 sck20/asck20 p21 so20/txd20 p22 si20/rxd20 p23 intp0/cpt20 /ss20 p24 intp1/to80/to20 p25 i/o port 2 6-bit i/o port input/output can be specified in 1-bit units when used as an input port, an connection of on-chip pull-up resistor can be specified by software. input intp2/ti80 p50 to p53 i/o port 5 4-bit n-ch open-drain input/output port input/output can be specified in 1-bit units. input ? p60 to p63 input port 6 4-bit input-only port input ani0 to ani3 data sheet u15929ej1v0ds 12 pd78F9116B, 78F9116B(a) 4.2 non-port pins pin name i/o function after reset alternate function intp0 p23/cpt20/ss20 intp1 p24/to80/to20 intp2 input external interrupt request input for which the valid edge (rising edge, falling edge, or both rising and falling edges) can be specified input p25/ti80 si20 input serial interface serial data input input p22/rxd20 so20 output serial interface serial data output input p21/txd20 sck20 i/o serial interface serial clock input/output input p20/asck20 asck20 input serial clock input for asynchronous serial interface input p20/sck20 ss20 input chip select input for serial interface input p23/cpt20/intp0 rxd20 input serial data input for asynchronous serial interface input p22/si20 txd20 output serial data output for asynchronous serial interface input p21/so20 ti80 input external count clock input to 8-bit timer/event counter 80 input p25/intp2 to80 output 8-bit timer/event counter 80 output input p24/intp1/to20 to20 output 16-bit timer 20 output input p24/intp1/to80 cpt20 input capture edge input input p23/intp0/ss20 ani0 to ani3 input a/d converter analog input input p60 to p63 av dd - a/d converter analog power supply ?? av ss - a/d converter ground potential ?? x1 input ?? x2 - connecting crystal resonator for main system clock oscillation ?? reset input system reset input input ? v dd - positive power supply ?? v ss - ground potential ?? v pp - sets flash memory programming mode. applies high voltage when a program is written or verified. ?? ic0 - internally connected. connect directly to v ss . ?? data sheet u15929ej1vds 13 pd78F9116B, 78F9116B(a) 4.3 pin i/o circuits and recommended connection of unused pins the input/output circuit type of each pin and recommended connection of unused pins are shown in table 4-1. for the input/output circuit configuration of each type, refer to figure 4-1. table 4-1. types of pin input/output circuits pin name input/output circuit type i/o recommended connection of unused pins p00 to p03 p10, p11 5-a p20/sck20/asck20 p21/so20/t x d20 p22/si20/r x d20 input: independently connect to v dd or v ss via a resistor. output: leave open p23/intp0/cpt20/ss20 p24/intp1/to80/to20 p25/intp2/ti80 8-a input: independently connect to v ss via a resistor. output: leave open p50 to p53 13-v i/o input: independently connect to v dd via a resistor. output: leave open p60/ani0 to p63/ani3 9-c input connect directly to v dd or v ss . av dd connect directly to v dd . av ss ?? connect directly to v ss . reset 2 input ? ic0 connect directly to v ss . v pp ?? connect a 10 k ? pull-down resistor or connect directly to v ss . data sheet u15929ej1v0ds 14 pd78F9116B, 78F9116B(a) figure 4-1. pin i/o circuits schmitt-triggered input with hysteresis characteristics type 2 in type 5-a pull-up enable data output disable input enable v dd p-ch v dd p-ch in/out n-ch type 13-v v ss v ss type 8-a pull-up enable data output disable v dd p-ch v dd p-ch in/out n-ch v ss type 9-c in comparator + ? v ref (threshold voltage) av ss p-ch n-ch input enable output data output disable in/out n-ch middle-voltage input buffer input enable data sheet u15929ej1vds 15 pd78F9116B, 78F9116B(a) 5. memory space figure 5-1 shows the memory map of the pd78F9116B and 78F9116B(a). figure 5-1. memory map special function register 256 8 bits internal high-speed ram 256 8 bits reserved program memory space data memory space program area program area callt table area vector table area flash memory 16384 8 bits ffffh ff00h feffh fe00h fdffh 3fffh 0080h 007fh 0040h 003fh 0016h 0015h 0000h 0000h 3fffh 4000h data sheet u15929ej1v0ds 16 pd78F9116B, 78F9116B(a) 6. flash memory characteristics flash memory programming is performed by connecting a dedicated flash programmer (flashpro iii (part no. fl- pr3, pg-fp3)/flashpro iv note (part no. fl-pr4, pg-fp4)) to the target system with the flash memory mounted on the target system (on-board). a flash memory writing adapter (program adapter), which is a target board used exclusively for programming, is also provided. note under development remark fl-pr3, fl-pr4, and the program adapter are the products made by naito densei machida mfg. co., ltd. (tel +81-45-475-4191). programming using flash memory has the following advantages. ? software can be modified after the microcontroller is solder-mounted on the target system. ? distinguishing software facilities low-quantity, varied model production ? easy data adjustment when starting mass production 6.1 programming environment the following shows the environment required for pd78F9116B and 78F9116B(a) flash memory programming. when flashpro iii (part no. fl-pr3, pg-fp3) or flashpro iv (part no. fl-pr4, pg-fp4) is used as a dedicated flash programmer, a host machine is required to control the dedicated flash programmer. communication between the host machine and flash programmer is performed via rs-232c/usb (rev. 1.1). for details, refer the manuals for flashpro iii/flashpro iv. remark usb is supported by flashpro iv only. figure 6-1. environment for writing program to flash memory host machine rs-232c usb dedicated flash programmer pd78F9116B, v pp v dd v ss reset 3-wire serial i/o or uart 78F9116B(a) data sheet u15929ej1vds 17 pd78F9116B, 78F9116B(a) 6.2 communication mode use the communication mode shown in table 6-1 to perform communication between the dedicated flash programmer and the pd78F9116B or 78F9116B(a). table 6-1. communication mode list type setting note 1 communication mode comm port sio clock cpu clock flash clock multiple rate pins used number of v pp pulses 3-wire serial i/o (sio3) sio ch-0 (3-wire, sync.) 100 hz to 1.25 mhz note 2 optional 1 to 10 mhz note 2 1.0 sck20/asck20/p20 so20/txd20/p21 si20/rxd20/p22 0 sio ch-1 (3-wire, sync.) p00 p01 p02 1 uart (uart0) uart ch-0 4800 to 76800 bps note 2, 3 optional 1 to 10 mhz note 2 txd20/so20/p21 rxd20/si20/p22 8 notes 1. selection items for type settings on the dedicated flash programmer (flashpro iii (part no. fl-pr3, pg-fp3)/flashpro iv (part no. fl-pr4, pg-fp4)). 2. the possible setting range differs depending on the voltage. for details, refer to 8. electrical specifications . caution be sure to select a communication mode depending on the number of v pp pulses shown in table 6-1. figure 6-2. communication mode selection format 10 v v ss v dd v pp v dd v ss reset 12 n v pp pulses data sheet u15929ej1v0ds 18 pd78F9116B, 78F9116B(a) figure 6-3. example of connection with dedicated flash programmer (a) 3-wired serial i/o mode (sio ch-0) vpp1 vdd reset sck so si gnd v pp v dd , av dd reset clk note x1 sck20 si20 so20 v ss , av ss flashpro iii pd78F9116B, 78F9116B(a) (b) 3-wired serial i/o mode (sio ch-1) vpp1 vdd reset sck so si gnd v pp v dd , av dd reset clk note x1 p00 (serial clock) p02 (serial input) p01 (serial output) v ss , av ss flashpro iii pd78F9116B, 78F9116B(a) note connect this pin when the system clock is supplied by flashpro iii. when a resonator has already been connected to the x1 pin, the clk pin does not need to be connected. caution the v dd pin, if already connected to the power supply, must be connected to the vdd pin of the dedicated flash programmer. before using the power supply connected to the v dd pin, supply voltage before starting programming. data sheet u15929ej1vds 19 pd78F9116B, 78F9116B(a) (c) uart mode vpp1 vdd reset so si gnd v pp v dd , av dd reset clk note x1 rxd20 txd20 v ss , av ss flashpro iii pd78F9116B, 78F9116B(a) note connect this pin when the system clock is supplied by flashpro iii. when a resonator has already been connected to the x1 pin, the clk pin does not need to be connected. caution the v dd pin, if already connected to the power supply, must be connected to the vdd pin of the dedicated flash programmer. before using the power supply connected to the v dd pin, supply voltage before starting programming. if flashpro iii (part no. fl-pr3, pg-fp3)/flashpro iv is used as a dedicated flash programmer, the following signals are generated for the pd78F9116B and 78F9116B(a). for details, refer to the manual of flashpro iii/flashpro iv. table 6-2. pin connection list signal name i/o pin function pin name 3-wire serial i/o uart vpp1 output write voltage v pp vpp2 ?? vdd i/o v dd voltage generation/voltage monitoring v dd /av dd note note gnd ? ground v ss /av ss clk output clock output x1 reset output reset signal reset si input reception signal so20/p01/txd20 so output transmit signal si20/p02/rxd20 sck output transfer clock sck20/p00 hs ?? ? note v dd voltage must be supplied before programming is started. remark : pin must be connected. : if the signal is supplied on the target board, pin need not be connected. : pin need not be connected. data sheet u15929ej1v0ds 20 pd78F9116B, 78F9116B(a) 6.3 on-board pin processing when performing programming on the target system, provide a connector on the target system to connect the dedicated flash programmer. an on-board function that allows switching between normal operation mode and flash memory programming mode may be required in some cases. data sheet u15929ej1vds 21 pd78F9116B, 78F9116B(a) (1) signal conflict if the dedicated flash programmer (output) is connected to a serial interface pin (input) that is connected to another device (output), a signal conflict occurs. to prevent this, isolate the connection with the other device or set the other device to the output high impedance status. figure 6-5. signal conflict (input pin of serial interface) input pin signal conflict connection pin of dedicated flash programmer other device output pin in the flash memory programming mode, the signal output by another device and the signal sent by the dedicated flash programmer conflict, therefore, isolate the signal of the other device. pd78F9116B, 78F9116B(a) (2) abnormal operation of other device if the dedicated flash programmer (output or input) is connected to a serial interface pin (input or output) that is connected to another device (input), a signal is output to the device, and this may cause an abnormal operation. to prevent this abnormal operation, isolate the connection with the other device or set so that the input signals to the other device are ignored. figure 6-6. abnormal operation of other device pin connection pin of dedicated flash programmer other device input pin if the signal output by the pd78F9116B or 78F9116B(a) affects another device in the flash memory programming mode, isolate the signals of the other device. pin connection pin of dedicated flash programmer other device input pin if the signal output by the dedicated flash programmer affects another device in the flash memory programming mode, isolate the signals of the other device. pd78F9116B, 78F9116B(a) pd78F9116B, 78F9116B(a) data sheet u15929ej1v0ds 22 pd78F9116B, 78F9116B(a) data sheet u15929ej1vds 23 pd78F9116B, 78F9116B(a) 6.4 connection when using flash memory writing adapter the following shows an example of the recommended connection when using the flash memory writing adapter. figure 6-8. example of flash memory writing adapter connection when using 3-wire serial i/o mode (sio-ch0) 28 27 26 30 29 25 24 23 22 21 20 19 18 16 1 2 3 4 5 6 7 8 9 10 11 12 13 17 14 15 pd78F9116B pd78F9116B(a) lvdd vdd gnd si so sck clkout reset vpp reserve/hs flash programmer interface v dd (2.7 to 5.5 v) gnd data sheet u15929ej1v0ds 24 pd78F9116B, 78F9116B(a) figure 6-9. example of flash memory writing adapter connection when using 3-wire serial i/o mode (sio-ch1) 28 27 26 30 29 25 24 23 22 21 20 19 18 16 1 2 3 4 5 6 7 8 9 10 11 12 13 17 14 15 pd78F9116B pd78F9116B(a) lv d d vdd gnd si so sck clkout reset vpp reserve/hs v dd (2.7 to 5.5 v) gnd flash programmer interface data sheet u15929ej1vds 25 pd78F9116B, 78F9116B(a) figure 6-10. example of flash memory writing adapter connection when using uart mode 28 27 26 30 29 25 24 23 22 21 20 19 18 16 1 2 3 4 5 6 7 8 9 10 11 12 13 17 14 15 pd78F9116B pd78F9116B(a) lvdd vdd gnd si so sck clkout reset vpp reserve/hs v dd (2.7 to 5.5 v) gnd flash programmer interface data sheet 15929ej1v0ds 26 pd78F9116B, 78F9116B(a) 7. instruction set overview this section shows a list of the instruction set for the pd78F9116B and 78F9116B(a). 7.1 conventions 7.1.1 operand identifiers and description methods operands are described in the ?operand? column of each instruction in accordance with the description method of the instruction operand identifier (refer to the assembler specifications for detail). when there are two or more description methods, select one of them. alphabetic letters in capitals and the symbols, #, !, $, and [ ], are keywords and must be described as they are. each symbol has the following meaning. ? #: immediate data specification ? $: relative address specification ? !: absolute address specification ? [ ]: indirect address specification in the case of immediate data, describe an appropriate numeric value or a label. when using a label, be sure to describe the #,!, $, or [ ] symbols. for operand register identifiers, r and rp, either function names (x, a, c, etc.) or absolute names (names in parentheses in the table below, r0, r1, r2, etc.) can be used for description. table 7-1. operand identifiers and description methods identifier description method r rp sfr x (r0), a (r1), c (r2), b (r3), e (r4), d (r5), l (r6), h (r7), ax (rp0), bc (rp1), de (rp2), hl (rp3) special function register symbol saddr saddrp fe20h to ff1fh immediate data or label fe20h to ff1fh immediate data or label (even address only) addr16 addr5 0000h to ffffh immediate data or label (only even addresses for 16-bit data transfer instructions) 0040h to 007fh immediate data or label (even address only) word byte bit 16-bit immediate data or label 8-bit immediate data or label 3-bit immediate data or label data sheet 15929ej1v0ds 27 pd78F9116B, 78F9116B(a) 7.1.2 descriptions of the operation field a: a register; 8-bit accumulator x: x register b: b register c: c register d: d register e: e register h: h register l: l register ax: ax register pair; 16-bit accumulator bc: bc register pair de: de register pair hl: hl register pair pc: program counter sp: stack pointer psw: program status word cy: carry flag ac: auxiliary carry flag z: zero flag ie: interrupt request enable flag nmis: non-maskable interrupt servicing flag ( ): memory contents indicated by address or register contents in parentheses x h , x l : higher 8 bits and lower 8 bits of 16-bit register : logical product (and) : logical sum (or) : exclusive or : inverted data addr16: 16-bit immediate data or label jdisp8: signed 8-bit data (displacement value) 7.1.3 description of the flag operation field (blank): not affected 0: cleared to 0 1: set to 1 : set/cleared according to the result r: previously saved value is restored data sheet 15929ej1v0ds 28 pd78F9116B, 78F9116B(a) 7.2 operations flag mnemonic operand byte clock operation zaccy r, #byte 3 6 r byte saddr , #byte 3 6 (addr) byte sfr, #byte 3 6 sfr byte a, r note 1 24a r r, a note 1 24r a a, saddr 2 4 a (saddr) saddr, a 2 4 (saddr) a a, sfr 2 4 a sfr sfr, a 2 4 sfr a a, !addr16 3 8 a (addr16) !addr16, a 3 8 (addr16) a psw, #byte 3 6 psw byte a, psw 2 4 a psw psw, a 2 4 psw a a, [de] 1 6 a (de) [de], a 1 6 (de) a a, [hl] 1 6 a (hl) [hl], a 1 6 (hl) a a, [hl + byte] 2 6 a (hl + byte) mov [hl + byte], a 2 6 (hl + byte) a a, x 1 4 a ? x a, r note 2 26a ? r a, saddr 2 6 a ? (saddr) a, sfr 2 6 a ? sfr a, [de] 1 8 a ? (de) a, [hl] 1 8 a ? (hl) xch a, [hl + byte] 2 8 a ? (hl + byte) rp, #word 3 6 rp word ax, saddrp 2 6 ax (saddrp) saddrp, ax 2 8 (saddrp) ax ax, rp note 3 1 4 ax rp movw rp, ax note 3 14rp ax xchw ax, rp note 3 1 8 ax ? rp notes 1. except r = a 2. except r = a or x 3. only when rp = bc, de, hl remark one instruction clock cycle is one cycle of the cpu clock (f cpu ), selected by the processor clock control register (pcc). data sheet 15929ej1v0ds 29 pd78F9116B, 78F9116B(a) flag mnemonic operand byte clock operation zaccy a, #byte 2 4 a, cy a + byte saddr, #byte 3 6 (saddr), cy (saddr) + byte a, r 2 4 a ,cy a + r a, saddr 2 4 a, cy a + (saddr) a, !addr16 3 8 a, cy a + (addr16) a, [hl] 1 6 a, cy a + (hl) add a, [hl + byte] 2 6 a, cy a + (hl + byte) a, #byte 2 4 a, cy a + byte + cy saddr, #byte 3 6 (saddr), cy (saddr) + byte + cy a, r 2 4 a, cy a + r + cy a, saddr 2 4 a, cy a + (saddr) + cy a, !addr16 3 8 a, cy a + (addr16) + cy a, [hl] 1 6 a, cy a + (hl) + cy addc a, [hl + byte] 2 6 a, cy a + (hl + byte) + cy a, #byte 2 4 a, cy a ? byte saddr, #byte 3 6 (saddr), cy (saddr) ? byte a, r 2 4 a, cy a ? r a, saddr 2 4 a, cy a ? (saddr) a, !addr16 3 8 a, cy a ? (addr16) a, [hl] 1 6 a, cy a ? (hl) sub a, [hl + byte] 2 6 a, cy a ? (hl + byte) a, #byte 2 4 a, cy a ? byte ? cy saddr, #byte 3 6 (saddr), cy (saddr) ? byte ? cy a, r 2 4 a, cy a ? r ? cy a, saddr 2 4 a, cy a ? (saddr) ? cy a, !addr16 3 8 a, cy a ? (addr16) ? cy a, [hl] 1 6 a, cy a ? (hl) ? cy subc a, [hl + byte] 2 6 a, cy a ? (hl + byte) ? cy a, #byte 2 4 a a byte saddr, #byte 3 6 (saddr) (saddr) byte a, r 2 4 a a r a, saddr 2 4 a a (saddr) a, !addr16 3 8 a a (addr16) a, [hl] 1 6 a a (hl) and a, [hl + byte] 2 6 a a (hl + byte) remark one instruction clock cycle is one cycle of the cpu clock (f cpu ), selected by the processor clock control register (pcc). data sheet 15929ej1v0ds 30 pd78F9116B, 78F9116B(a) flag mnemonic operand byte clock operation zaccy a, #byte 2 4 a a byte saddr, #byte 3 6 (saddr) (saddr) byte a, r 2 4 a a r a, saddr 2 4 a a (saddr) a, !addr16 3 8 a a (addr16) a, [hl] 1 6 a a (hl) or a, [hl + byte] 2 6 a a (hl + byte) a, #byte 2 4 a a byte saddr, #byte 3 6 (saddr) (saddr) byte a, r 2 4 a a r a, saddr 2 4 a a (saddr) a, !addr16 3 8 a a (addr16) a, [hl] 1 6 a a (hl) xor a, [hl + byte] 2 6 a a (hl + byte) a, #byte 2 4 a ? byte saddr, #byte 3 6 (saddr) ? byte a, r 2 4 a ? r a, saddr 2 4 a ? (saddr) a, !addr16 3 8 a ? (addr16) a, [hl] 1 6 a ? (hl) cmp a, [hl + byte] 2 6 a ? (hl + byte) addw ax, #word 3 6 ax, cy ax + word subw ax, #word 3 6 ax, cy ax ? word cmpw ax, #word 3 6 ax ? word r24r r + 1 inc saddr 2 4 (saddr) (saddr) + 1 r24r r ? 1 dec saddr 2 4 (saddr) (saddr) ? 1 incw rp 1 4 rp rp + 1 decw rp 1 4 rp rp ? 1 ror a, 1 1 2 (cy, a 7 a 0 , a m ? 1 a m ) 1 rol a, 1 1 2 (cy, a 0 a 7 , a m + 1 a m ) 1 rorc a, 1 1 2 (cy a 0 , a 7 cy, a m ? 1 a m ) 1 rolc a, 1 1 2 (cy a 7 , a 0 cy, a m + 1 a m ) 1 remark one instruction clock cycle is one cycle of the cpu clock (f cpu ), selected by the processor clock control register (pcc). data sheet 15929ej1v0ds 31 pd78F9116B, 78F9116B(a) flag mnemonic operand byte clock operation zaccy saddr. bit 3 6 (saddr. bit) 1 sfr. bit 3 6 sfr. bit 1 a. bit 2 4 a. bit 1 psw. bit 3 6 psw. bit 1 set1 [hl]. bit 2 10 (hl) . bit 1 saddr. bit 3 6 (saddr. bit) 0 sfr. bit 3 6 sfr. bit 0 a. bit 2 4 a. bit 0 psw. bit 3 6 psw. bit 0 clr1 [hl]. bit 2 10 (hl) . bit 0 set1 cy 1 2 cy 11 clr1 cy 1 2 cy 00 not1 cy 1 2 cy cy call !addr16 3 6 (sp ? 1) (pc + 3) h ,(sp ? 2) (pc + 3) l , pc addr16, sp sp ? 2 callt [addr5] 1 8 (sp ? 1) (pc + 1) h ,(sp ? 2) (pc + 1) l , pc h (00000000, addr5 + 1), pc l (00000000, addr5), sp sp ? 2 ret 1 6 pc h (sp + 1), pc l (sp), sp sp + 2 reti 1 8 pc h (sp + 1), pc l (sp), psw (sp + 2), sp sp + 3, nmis 0 rrr psw 1 2 (sp ? 1) psw, sp sp ? 1 push rp 1 4 (sp ? 1) rp h , (sp ? 2) rp l , sp sp ? 2 psw 1 4 psw (sp), sp sp + 1 r r r pop rp 1 6 rp h (sp + 1), rp l (sp), sp sp + 2 sp, ax 2 8 sp ax movw ax, sp 2 6 ax sp !addr16 3 6 pc addr16 $addr16 2 6 pc pc + 2 + jdisp8 br ax 1 6 pc h a, pc l x remark one instruction clock cycle is one cycle of the cpu clock (f cpu ), selected by the processor clock control register (pcc). data sheet 15929ej1v0ds 32 pd78F9116B, 78F9116B(a) flag mnemonic operand byte clock operation zaccy bc $addr16 2 6 pc pc + 2 + jdisp8 if cy = 1 bnc $addr16 2 6 pc pc + 2 + jdisp8 if cy = 0 bz $addr16 2 6 pc pc + 2 + jdisp8 if z = 1 bnz $addr16 2 6 pc pc + 2 + jdisp8 if z = 0 saddr. bit, $addr16 4 10 pc pc + 4 + jdisp8 if (saddr. bit) = 1 sfr. bit, $addr16 4 10 pc pc + 4 + jdisp8 if sfr. bit = 1 a. bit , $addr16 3 8 pc pc + 3 + jdisp8 if a. bit = 1 bt psw. bit, $addr16 4 10 pc pc + 4 + jdisp8 if psw. bit = 1 saddr. bit, $addr16 4 10 pc pc + 4 + jdisp8 if (saddr. bit) = 0 sfr. bit, $addr16 4 10 pc pc + 4 + jdisp8 if sfr. bit = 0 a. bit, $addr16 3 8 pc pc + 3 + jdisp8 if a. bit = 0 bf psw. bit, $addr16 4 10 pc pc + 4 + jdisp8 if psw. bit = 0 b, $addr16 2 6 b b ? 1, then pc pc + 2 + jdisp8 if b 0 c, $addr16 2 6 c c ? 1, then pc pc + 2 + jdisp8 if c 0 dbnz saddr, $addr16 3 8 (saddr) (saddr) ? 1, then pc pc + 3 + jdisp8 if(saddr) 0 nop 1 2 no operation ei 3 6 ie 1(enable interrupt) di 3 6 ie 0(disable interrupt) halt 1 2 set halt mode stop 1 2 set stop mode remark one instruction clock cycle is one cycle of the cpu clock (f cpu ), selected by the processor clock control register (pcc). data sheet u15929ej1v0ds 33 pd78F9116B, 78F9116B(a) 8. electrical specifications absolute maximum ratings (t a = 25 c) parameter symbol conditions ratings unit v dd , av dd v dd = av dd ?0.3 to +6.5 v supply voltage v pp ?0.3 to +10.5 v v i1 pins other than p50 to p53 ?0.3 to v dd + 0.3 v input voltage v i2 p50 to p53 with n-ch open drain ?0.3 to +13 v output voltage v o ?0.3 to v dd + 0.3 v per pin pd78F9116B ?10 ma total for all pins ?30 ma per pin pd78F9116B(a) 10 ma output current, high i oh total for all pins 120 ma per pin pd78F9116B 30 ma total for all pins 160 ma per pin pd78F9116B(a) ?7 ma output current, low i ol total for all pins ?22 ma in normal operation mode ?40 to +85 c operating ambient temperature t a during flash memory programming 10 to 40 c storage temperature t stg ?40 to +125 c caution product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. that is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded. remark unless specified otherwise, the characteristics of alternate-function pins are the same as those of port pins. data sheet u15929ej1v0ds 34 pd78F9116B, 78F9116B(a) system clock oscillator characteristics (t a = ?40 to +85 c, v dd = 1.8 to 5.5 v) resonator recommended circuit parameter conditions min. typ. max. unit oscillation frequency (f x ) note 1 v dd = 4.5 to 5.5 v 1.0 10.0 mhz v dd = 3.0 to 5.5 v 1.0 6.0 mhz v dd = 1.8 to 5.5 v 1.0 5.0 mhz ceramic resonator x2 x1 v pp c2 c1 oscillation stabilization time note 2 after v dd reaches oscillation voltage range min. 4ms oscillation frequency (f x ) note 1 v dd = 4.5 to 5.5 v 1.0 10.0 mhz v dd = 3.0 to 5.5 v 1.0 6.0 mhz v dd = 1.8 to 5.5 v 1.0 5.0 mhz v dd = 4.5 to 5.5 v 10 ms crystal resonator x2 x1 v pp c2 c1 oscillation stabilization time note 2 v dd = 1.8 to 5.5 v 30 x1 input frequency (f x ) note 1 v dd = 4.5 to 5.5 v 1.0 10.0 mhz v dd = 3.0 to 5.5 v 1.0 6.0 mhz v dd = 1.8 to 5.5 v 1.0 5.0 mhz v dd = 4.5 to 5.5 v 45 500 ns x1 x2 v dd = 3.0 to 5.5 v 75 500 ns x1 input high-/low-level width (t xh , t xl ) v dd = 1.8 to 5.5 v 85 500 ns x1 input frequency (f x ) note 1 v dd = 2.7 to 5.5 v 1.0 5.0 mhz external clock x1 x2 open x1 input high-/low-level width (t xh , t xl ) 85 500 ns notes 1. indicates only oscillator characteristics. refer to ac characteristics for instruction execution time. 2. time required to stabilize oscillation after a reset or stop mode release. use the resonator that stabilizes oscillation during the oscillation wait time. caution when using the system clock oscillator, wire as follows in the area enclosed by the broken lines in the above figures to avoid an adverse effect from wiring capacitance. keep the wiring length as short as possible. do not cross the wiring with the other signal lines. do not route the wiring near a signal line through which a high fluctuating current flows. always make the ground point of the oscillator capacitor the same potential as v ss . do not ground the capacitor to a ground pattern through which a high current flows. do not fetch signals from the oscillator. remark for the resonator selection and oscillator constant, customers are requested to either evaluate the oscillation themselves or apply to the resonator manufacturer for evaluation. data sheet u15929ej1v0ds 35 pd78F9116B, 78F9116B(a) dc characteristics (t a = ?40 to +85 c, v dd = 1.8 to 5.5 v) (1/2) parameter symbol conditions min. typ. max. unit per pin pd78F9116B ?1 ma output current, high i oh total for all pins ?15 ma per pin pd78F9116B(a) ?1 ma total for all pins ?11 ma per pin pd78F9116B 10 ma total for all pins 80 ma per pin pd78F9116B(a) 3 ma output current, low i ol total for all pins 60 ma v dd = 2.7 to 5.5 v 0.7 v dd v dd v v ih1 pins other than described below v dd = 1.8 to 5.5 v 0.9 v dd v dd v v dd = 2.7 to 5.5 v 0.7 v dd 12 v v ih2 p50 to p53 n-ch open drain v dd = 1.8 to 5.5 v, t a = 25 to 85 c 0.9 v dd 12 v v dd = 2.7 to 5.5 v 0.8 v dd v dd v v ih3 reset, p20 to p25 v dd = 1.8 to 5.5 v 0.9 v dd v dd v v dd = 4.5 to 5.5 v v dd ? 0.5 v dd v input voltage, high v ih4 x1, x2 v dd = 1.8 to 5.5 v v dd ? 0.1 v dd v v dd = 2.7 to 5.5 v 0 0.3 v dd v v il1 pins other than described below v dd = 1.8 to 5.5 v 0 0.1 v dd v v dd = 2.7 to 5.5 v 0 0.3 v dd v v il2 p50 to p53 n-ch open drain v dd = 1.8 to 5.5 v, t a = 25 to 85 c 0 0.1 v dd v v dd = 2.7 to 5.5 v 0 0.2 v dd v v il3 reset, p20 to p25 v dd = 1.8 to 5.5 v 0 0.1 v dd v v dd = 4.5 to 5.5 v 0 0.4 v input voltage, low v il4 x1, x2 v dd = 1.8 to 5.5 v 0 0.1 v v oh1 v dd = 4.5 to 5.5 v, i oh = ?1 ma v dd ? 1.0 v output voltage, high v oh2 v dd = 1.8 to 5.5 v, i oh = ?100 av dd ? 0.5 v v dd = 4.5 to 5.5 v, i ol = 10 ma ( pd78F9116B) 1.0 v v dd = 4.5 to 5.5 v, i ol = 3 ma ( pd78F9116B(a)) 1.0 v v ol1 pins other than p50 to p53 v dd = 1.8 to 5.5 v, i ol = 400 a0.5v v dd = 4.5 to 5.5 v, i ol = 10 ma ( pd78F9116B) 1.0 v v dd = 4.5 to 5.5 v, i ol = 3 ma ( pd78F9116B(a)) 1.0 v output voltage, low v ol2 p50 to p53 v dd = 1.8 to 5.5 v, i ol = 1.6 ma 0.4 v remark unless specified otherwise, the characteristics of alternate-function pins are the same as those of port pins. data sheet u15929ej1v0ds 36 pd78F9116B, 78F9116B(a) dc characteristics (t a = ?40 to +85 c, v dd = 1.8 to 5.5 v) (2/2) parameter symbol conditions min. typ. max. unit i lih1 pins other than x1, x2, or p50 to p53 v in = v dd 3 a i lih2 x1, x2 20 a input leakage current, high i lih3 p50 to p53 (n-ch open drain) v in = 12 v 20 a i lil1 pins other than x1, x2, or p50 to p53 v in = 0 v ?3 a i lil2 x1, x2 ? 20 a input leakage current, low i lil3 p50 to p53 (n-ch open drain) ? 3 note 1 a output leakage current, high i loh v out = v dd 3 a output leakage current, low i lol v out = 0 v ?3 a software pull-up resistor r 1 v in = 0 v, for pins other than p50 to p53 50 100 200 k ? 10.0 mhz crystal oscillation operating mode v dd = 5.0 v 10% note 4 10.0 20.0 ma 6.0 mhz crystal oscillation operating mode v dd = 5.0 v 10% note 4 6.0 12.0 ma v dd = 5.0 v 10% note 4 4.0 10.0 ma v dd = 3.0 v 10% note 5 1.0 2.5 ma i dd1 note 2 5.0 mhz crystal oscillation operating mode (c1 = c2 = 22 pf) v dd = 2.0 v 10% note 5 0.8 2.0 ma 10.0 mhz crystal oscillation halt mode v dd = 5.0 v 10% note 4 1.2 6.0 ma 6.0 mhz crystal oscillation halt mode v dd = 5.0 v 10% note 4 0.9 2.8 ma v dd = 5.0 v 10% note 4 0.6 2.5 ma v dd = 3.0 v 10% note 5 0.3 2.0 ma i dd2 note 2 5.0 mhz crystal oscillation halt mode (c1 = c2 = 22 pf) v dd = 2.0 v 10% note 5 0.2 1.5 ma v dd = 5.0 v 10% 0.1 30 a v dd = 3.0 v 10% 0.05 10 a i dd3 note 2 stop mode v dd = 2.0 v 10% 0.05 10 a 10.0 mhz crystal oscillation a/d operating mode v dd = 5.0 v 10% note 4 11.0 22.5 ma 6.0 mhz crystal oscillation a/d operating mode v dd = 5.0 v 10% note 4 7.0 14.5 ma v dd = 5.0 v 10% note 4 5.0 12.5 ma v dd = 3.0 v 10% note 5 2.0 5.0 ma power supply current i dd4 note 3 5.0 mhz crystal oscillation a/d operating mode (c1 = c2 = 22 pf) v dd = 2.0 v 10% note 5 1.8 4.5 ma notes 1. when port 5 is in input mode, a low-level input leakage current of ?60 a (max.) flows only for 1 cycle time after a read instruction has been executed to port 5. 2. the current flowing to the ports (including the current flowing through an on-chip pull-up resistor) and av dd current are not included. 3. the current flowing to the ports (including the current flowing through an on-chip pull-up resistor) is not included. 4. high-speed mode operation (when processor clock control register (pcc) is set to 00h.) 5. low-speed mode operation (when pcc is set to 02h). remark unless specified otherwise, the characteristics of alternate-function pins are the same as those of port pins. data sheet u15929ej1v0ds 37 pd78F9116B, 78F9116B(a) flash memory write/erase characteristics (t a = 10 to 40 c, v dd = 1.8 to 5.5 v) parameter symbol conditions min. typ. max. unit operating frequency v dd = 4.5 to 5.5 v 1.0 10.0 mhz v dd = 3.0 to 5.5 v 1.0 6.0 mhz v dd = 2.7 to 5.5 v 1.0 5.0 mhz f x v dd = 1.8 to 5.5 v 1.0 1.25 mhz write current (v dd pin) note i ddw when v pp supply voltage = v pp1 ( 5.0 mhz crystal oscillation operating mode ) 21 ma write current (v pp pin) note i ppw when v pp supply voltage = v pp1 22.5 ma erase current (v dd pin) note i dde when v pp supply voltage = v pp1 ( 5.0 mhz crystal oscillation operating mode ) 3ma erase current (v pp pin) note i ppe when v pp supply voltage = v pp1 115 ma unit erase time t er 0.2 0.2 0.2 s total erase time t era 20 s write count erase/write are regarded as 1 cycle 20 times v pp0 in normal operation 0 0.2v dd v v pp supply voltage v pp1 during flash memory programming 9.7 10.0 10.3 v note the current flowing to the ports (including the current flowing through an on-chip pull-up resistor) and av dd current are not included. data sheet u15929ej1v0ds 38 pd78F9116B, 78F9116B(a) ac characteristics (1) basic operation (t a = ?40 to +85 c, v dd = 1.8 to 5.5 v) parameter symbol conditions min. typ. max. unit v dd = 4.5 to 5.5 v 0.2 8 s v dd = 3.0 to 5.5 v 0.33 8 s v dd = 2.7 to 5.5 v 0.4 8 s cycle time (minimum instruction execution time) t cy v dd = 1.8 to 5.5 v 1.6 8 s v dd = 2.7 to 5.5 v 0.1 s ti80 input high-/low- level width t tih , t til v dd = 1.8 to 5.5 v 1.8 s v dd = 2.7 to 5.5 v 0 4 mhz ti80 input frequency f ti v dd = 1.8 to 5.5 v 0 275 khz interrupt input high- /low-level width t inth , t intl intp0 to intp2 10 s reset low-level width t rsl 10 s cpt20 input high- /low-level width t cph , t cpl 10 s t cy vs v dd supply voltage v dd [v] cycle time t cy [ s] 12 4 356 0.1 0.4 1.0 10 60 guaranteed operation range data sheet u15929ej1v0ds 39 pd78F9116B, 78F9116B(a) (2) serial interface (t a = ?40 to +85 c, v dd = 1.8 to 5.5 v) (i) 3-wire serial i/o mode (sck20...internal clock output) parameter symbol conditions min. typ. max. unit v dd = 2.7 to 5.5 v 800 ns sck20 cycle time t kcy1 v dd = 1.8 to 5.5 v 3200 ns v dd = 2.7 to 5.5 v t kcy1 /2 ? 50 ns sck20 high-/low- level width t kh1 , t kl1 v dd = 1.8 to 5.5 v t kcy1 /2 ? 150 ns v dd = 2.7 to 5.5 v 150 ns si20 setup time (to sck20 ) t sik1 v dd = 1.8 to 5.5 v 500 ns v dd = 2.7 to 5.5 v 400 ns si20 hold time (from sck20 ) t ksi1 600 ns v dd = 2.7 to 5.5 v 0 250 ns so20 output delay time from sck20 t kso1 r = 1 k ? , c = 100 pf note v dd = 1.8 to 5.5 v 0 1000 ns note r and c are the load resistance and load capacitance of the so output line. (ii) 3-wire serial i/o mode (sck20...external clock input) parameter symbol conditions min. typ. max. unit v dd = 2.7 to 5.5 v 800 ns sck20 cycle time t kcy2 v dd = 1.8 to 5.5 v 3200 ns v dd = 2.7 to 5.5 v 400 ns sck20 high-/low- level width t kh2 , t kl2 v dd = 1.8 to 5.5 v 1600 ns v dd = 2.7 to 5.5 v 100 ns si20 setup time (to sck20 ) t sik2 v dd = 1.8 to 5.5 v 150 ns v dd = 2.7 to 5.5 v 400 ns si20 hold time (from sck20 ) t ksi2 v dd = 1.8 to 5.5 v 600 ns v dd = 2.7 to 5.5 v 0 300 ns so20 output delay time from sck20 t kso2 r = 1 k ? , c = 100 pf note v dd = 1.8 to 5.5 v 0 1000 ns v dd = 2.7 to 5.5 v 120 ns so20 setup time (for ss20 when ss20 is used) t kas2 v dd = 1.8 to 5.5 v 400 ns v dd = 2.7 to 5.5 v 240 ns so20 disable time (for ss20 when ss20 is used) t kds2 v dd = 1.8 to 5.5 v 800 ns note r and c are the load resistance and load capacitance of the so output line. (iii) uart mode (dedicated baud rate generator output) parameter symbol conditions min. typ. max. unit v dd = 2.7 to 5.5 v 78125 bps transfer rate v dd = 1.8 to 5.5 v 19531 bps data sheet u15929ej1v0ds 40 pd78F9116B, 78F9116B(a) (iv) uart mode (external clock input) parameter symbol conditions min. typ. max. unit v dd = 2.7 to 5.5 v 800 ns asck20 cycle time t kcy3 v dd = 1.8 to 5.5 v 3200 ns v dd = 2.7 to 5.5 v 400 ns asck20 high-/low- level width t kh3 , t kl3 v dd = 1.8 to 5.5 v 1600 ns v dd = 2.7 to 5.5 v 39063 bps transfer rate v dd = 1.8 to 5.5 v 9766 bps asck20 rise/fall time t r , t f 1 s data sheet u15929ej1v0ds 41 pd78F9116B, 78F9116B(a) ac timing test points (excluding x1 input) 0.8v dd 0.2v dd 0.8v dd 0.2v dd test points clock timing 1/f x t xl t xh x1 input v ih4 (min.) v il4 (max.) ti timing ti80 t til t tih 1/f ti interrupt input timing intp0 to intp2 t intl t inth reset input timing reset t rsl data sheet u15929ej1v0ds 42 pd78F9116B, 78F9116B(a) serial transfer timing 3-wire serial i/o mode: sck20 t klm t kcym t khm si20 input data t ksim t sikm output data t ksom so20 m = 1, 2 3-wire serial i/o mode (when ss20 is used): t kas2 so20 ss20 output data t kds2 uart mode (external clock input): asck20 t r t f t kl3 t kcy3 t kh3 data sheet u15929ej1v0ds 43 pd78F9116B, 78F9116B(a) 10-bit a/d converter characteristics (t a = ? ? ? ? 40 to +85c, av dd = v dd = 1.8 to 5.5 v, av ss = v ss = 0 v) parameter symbol conditions min. typ. max. unit resolution 10 10 10 bit 4.5 v v dd 5.5 v 0.2 0.4 %fsr 2.7 v v dd < 4.5 v 0.4 0.6 %fsr overall error note1,2 1.8 v v dd < 2.7 v 0.8 1.2 %fsr 4.5 v v dd 5.5 v 12 100 s 2.7 v v dd < 4.5 v 14 100 s conversion time t conv 1.8 v v dd < 2.7 v 28 100 s 4.5 v v dd 5.5 v 0.4 %fsr 2.7 v v dd < 4.5 v 0.6 %fsr zero-scale error note1,2 1.8 v v dd < 2.7 v 1.2 %fsr 4.5 v v dd 5.5 v 0.4 %fsr 2.7 v v dd < 4.5 v 0.6 %fsr full-scale error note1,2 1.8 v v dd < 2.7 v 1.2 %fsr 4.5 v v dd 5.5 v 2.5 lsb 2.7 v v dd < 4.5 v 4.5 lsb integral linearity error note1 ile 1.8 v v dd < 2.7 v 8.5 lsb 4.5 v v dd 5.5 v 1.5 lsb 2.7 v v dd < 4.5 v 2.0 lsb differential linearity error note1 dle 1.8 v v dd < 2.7 v 3.5 lsb analog input voltage v ian 0av dd v notes 1. excludes quantization error ( 0.05%fsr). 2. it is indicated as a ratio to the full-scale value (%fsr). data sheet u15929ej1v0ds 44 pd78F9116B, 78F9116B(a) data memory stop mode low supply voltage data retention characteristics (t a = ?40 to +85 c) parameter symbol conditions min. typ. max. unit data retention supply voltage v dddr 1.8 5.5 v release signal set time t srel 0 s release by reset 2 15 /f x ms oscillation stabilization wait time note 1 t wait release by interrupt request note 2 ms notes 1. the oscillation stabilization wait time is the period during which the cpu operation is stopped to avoid unstable operation at the beginning of oscillation. 2. selection of 2 12 /f x , 2 15 /f x , or 2 17 /f x is possible with bits 0 to 2 (osts0 to osts2) of the oscillation stabilization time select register. remark f x : system clock oscillation frequency data retention timing (stop mode release by reset) v dd data retention mode stop mode halt mode internal reset operation operating mode t srel t wait stop instruction execution v dddr reset data retention timing (standby release signal: stop mode release by interrupt signal) v dd data retention mode stop mode halt mode operating mode t srel t wait stop instruction execution v dddr standby release signal (interrupt request) data sheet u15929ej1v0ds 45 pd78F9116B, 78F9116B(a) 9. package drawing s s h j t i g d e f c b k p l u n item b c i l m n 30-pin plastic ssop (7.62 mm (300)) a k d e f g h j p 30 16 115 a detail of lead end m m t millimeters 0.65 (t.p.) 0.45 max. 0.13 0.5 6.1 0.2 0.10 9.85 0.15 0.17 0.03 0.1 0.05 0.24 1.3 0.1 8.1 0.2 1.2 + 0.08 ? 0.07 1.0 0.2 3 + 5 ? 3 0.25 0.6 0.15 u note each lead centerline is located within 0.13 mm of its true position (t.p.) at maximum material condition. s30mc-65-5a4-2 data sheet u15929ej1v0ds 46 pd78F9116B, 78F9116B(a) 10. recommended soldering conditions the pd78F9116B and 78F9116B(a) should be soldered and mounted under the following recommended conditions. for the details of the recommended soldering conditions, refer to the document semiconductor device mounting technology manual (c10535e) . for soldering methods and conditions other than those recommended below, contact your nec sales representative. table 10-1. surface mounting type soldering conditions pd78F9116Bmc-5a4: 30-pin plastic ssop (7.62 mm (300)) pd78F9116Bmc(a)-5a4: 30-pin plastic ssop (7.62 mm (300)) soldering method soldering conditions recommended condition symbol infrared reflow package peak temperature: 235c, time: 30 seconds max. (at 210c or higher), count: three times or less: 3 max., exposure limit: 7days note (after that, prebake at 125 c for 10 hours) ir35-107-3 vps package peak temperature: 215c, time: 40 seconds max. (at 200c or higher), count: three time or less, exposure limit: 7days note (after that, prebake at 125 c for 10 hours) vp15-107-3 wave soldering solder bath temperature: 260c max., time: 10 seconds max., count: once preheating temperature: 120c or below (package surface temperature), exposure limit : 7days note (after that, prebake at 125 c for 10 hours) ws60-107-1 partial heating pin temperature: 300c max., time: 3 sec. max. (per pin row) ? note after opening the dry pack, store it at 25 c or less and 65% rh or less for the allowable storage period. caution do not use different soldering methods together (except for partial heating). data sheet u15929ej1v0ds 47 pd78F9116B, 78F9116B(a) appendix a. development tools the following development tools are available for system development using the pd78F9116B and 78F9116B(a). software package sp78k0s notes 1, 2 cd-rom in which the development tools (software) common to the 78k/0s series are included as a package language processing software ra78k0s notes 1, 2, 3 assembler package common to 78k/0s series cc78k0s notes 1, 2, 3 c compiler package common to 78k/0s series df789136 notes 1, 2, 3 device file for pd78F9116B flash memory writing tools flashpro lil (model number: fl-pr3 note 4 , pg-fp3) dedicated flash programmer for on-chip flash memory fa-30mc note 4 flash memory writing adapter debugging tools (1/2) ie-78k0s-ns in-circuit emulator in-circuit emulator serves to debug hardware and software when developing application systems using a 78k/0s series product. it supports the id78k0s-ns integrated debugger. used in combination with an ac adapter, emulation probe, and interface adapter connecting to the host machine. ie-78k0s-ns-a in-circuit emulator the ie-78k0s-ns-a provides a coverage function in addition to the ie-78k0s-ns functions, thus enhancing the debug functions, including the tracer and timer functions. ie-70000-mc-ps-b ac adapter adapter used to supply power from a power outlet of 100 v ac to 240 v ac. ie-70000-98-if-c interface adapter adapter when pc-9800 series pc (except notebook type) is used as the host machine (c bus supported). ie-70000-cd-if-a pc card interface pc card and interface cable when notebook pc is used as the host machine (pcmcia socket supported). ie-70000-pc-if-c interface adapter adapter when using an ibm pc/at? or compatible as the host machine. ie-70000-pci-if-a interface adapter adapter when using pc that includes a pci bus as the ie-78k0s-ns host machine. ie-789136-ns-em1 emulation board board for emulation of the peripheral hardware peculiar to a device. used in combination with an in-circuit emulator. np-36gs note 4 board used to connect the in-circuit emulator to the target system. for a 30-pin plastic ssop (mc-5a4 type), used in combination with ngs-30. ngs-30 note 4 conversion socket conversion socket used to connect the np-36gs to the target system board designed to mount a 30-pin plastic ssop (mc-5a4 type). notes 1. pc-9800 series (japanese windows?) based 2. ibm pc/at or compatibles (japanese/english windows) based 3. hp9000 series 700? (hp-ux?) based, sparcstation? (sunos?, solaris?) based. 4. products made by naito densei machida mfg. co., ltd. (phone: +81-45-475-4191) remark ra78k0s, cc78k0s, sm78k0s, and id78k0s-ns are used in combination with the df789136. data sheet u15929ej1v0ds 48 pd78F9116B, 78F9116B(a) debugging tools (2/2) sm78k0s notes 1, 2 system simulator common to 78k/0s series id78k0s-ns notes 1, 2 integrated debugger common to 78k/0s series df789136 notes 1, 2 device file for pd78F9116B notes 1. pc-9800 series (japanese windows) based 2. ibm pc/at or compatibles (japanese/english windows) based remark ra78k0s, cc78k0s, sm78k0s, and id78k0s-ns are used in combination with the df789136. data sheet u15929ej1v0ds 49 pd78F9116B, 78F9116B(a) appendix b. related documents the related documents listed above are subject to change without notice. be sure to use the latest version of each document for designing. documents related to devices document name document no. pd789101a, 102a, 104a, 111a, 112a, 114a, 101a(a), 102a(a), 104a(a), 111a(a), 112a(a), 114a(a) data sheet u14590e pd78F9116B, 78F9116B(a) data sheet this manual pd789104a, 789114a, 789124a, 789134a subseries user?s manual u14643e 78k/0s series user?s manual instructions u11047e documents related to development software tools (user?s manuals) document name document no. operation u14876e language u14877e ra78k0s assembler package structured assembly language u11623e operation u14871e cc78k0s c compiler language u14872e sm78k0s, sm78k0 system simulator ver. 2.10 or later operation (windows based) u14611e sm78k series system simulator ver. 2.10 or later external part user open interface specification u15006e id78k0-ns, id78k0s-ns integrated debugger ver. 2.20 or later operation (windows based) u14910e project manager ver. 3.12 or later (windows based) u14610e documents related to development hardware tools (user?s manuals) document name document no. ie-78k0s-ns in-circuit emulator u13549e ie-78k0s-ns-a in-circuit emulator u15207e ie-789136-ns-em1 emulation board u14363e documents related to flash memory writing document name document no. pg-fp3 flash memory programmer user?s manual u13502e caution the related documents listed above are subject to change without notice. be sure to use the latest version of each document for designing. data sheet u15929ej1v0ds 50 pd78F9116B, 78F9116B(a) other related documents document name document no. semiconductor selection guide - products & packages - x13769e semiconductor device mounting technology manual c10535e quality grades on nec semiconductor devices c11531e nec semiconductor device reliability/quality control system c10983e guide to prevent damage for semiconductor devices by electrostatic discharge (esd) c11892e caution the related documents listed above are subject to change without notice. be sure to use the latest version of each document for designing. data sheet u15929ej1v0ds 51 pd78F9116B, 78F9116B(a) [memo] data sheet u15929ej1v0ds 52 pd78F9116B, 78F9116B(a) [memo] data sheet u15929ej1v0ds 53 pd78F9116B, 78F9116B(a) [memo] data sheet u15929ej1v0ds 54 pd78F9116B, 78F9116B(a) notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. production process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed immediately after power-on for devices having reset function. eeprom and fip are trademarks of nec corporation. windows is either a registered trademark or a trademark of microsoft corporation in the united states and/or other countries. pc/at is a trademark of international business machines corporation. hp9000 series 700 and hp-ux are trademarks of hewlett-packard company. sparcstation is a trademark of sparc international, inc. solaris and sunos are trademarks of sun microsystems, inc. data sheet u15929ej1v0ds 55 pd78F9116B, 78F9116B(a) regional information some information contained in this document may vary from country to country. before using any nec product in your application, piease contact the nec office in your country to obtain a list of authorized representatives and distributors. they will verify: ? device availability ? ordering information ? product release schedule ? availability of related technical literature ? development environment specifications (for example, specifications for third-party tools and components, host computers, power plugs, ac supply voltages, and so forth) ? network requirements in addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary from country to country. nec electronics inc. (u.s.) santa clara, california tel: 408-588-6000 800-366-9782 fax: 408-588-6130 800-729-9288 nec electronics hong kong ltd. hong kong tel: 2886-9318 fax: 2886-9022/9044 nec electronics hong kong ltd. seoul branch seoul, korea tel: 02-528-0303 fax: 02-528-4411 nec electronics shanghai, ltd. shanghai, p.r. china tel: 021-6841-1138 fax: 021-6841-1137 nec electronics taiwan ltd. taipei, taiwan tel: 02-2719-2377 fax: 02-2719-5951 nec electronics singapore pte. ltd. novena square, singapore tel: 253-8311 fax: 250-3583 nec do brasil s.a. electron devices division guarulhos-sp, brasil tel: 11-6462-6810 fax: 11-6462-6829 j02.3-1 nec electronics (europe) gmbh duesseldorf, germany tel: 0211-65 03 01 fax: 0211-65 03 327 ? branch the netherlands eindhoven, the netherlands tel: 040-244 58 45 fax: 040-244 45 80 ? branch sweden taeby, sweden tel: 08-63 80 820 fax: 08-63 80 388 ? filiale italiana milano, italy tel: 02-667541 fax: 02-66754299 nec electronics (uk) ltd. milton keynes, uk tel: 01908-691-133 fax: 01908-670-290 nec electronics (france) s.a. v lizy-villacoublay, france tel: 01-3067-58-00 fax: 01-3067-58-99 nec electronics (france) s.a. representaci n en espa ? a madrid, spain tel: 091-504-27-87 fax: 091-504-28-60 pd78F9116B, 78F9116B(a) m8e 00. 4 the information in this document is current as of january, 2002. the inform ation is subject to change without notice. for actual design-in, refer to the latest publications of nec's data sheets or data books, etc., for the most up-to-date specifications of nec semiconductor products. not all products and/or types are available in every country. please check with an nec sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without prior written consent of nec. nec assumes no responsibility for any errors that may appear in this document. nec does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec semiconductor products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other in tellectual property rights of nec or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. nec assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec endeavours to enhance the quality, reliability and safety of nec semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. nec semiconductor products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. the recommended applications of a semiconductor product depend on its quality grade, as indicated below. customers must check the quality grade of each semiconductor product before using it in a particular application. "standard": com puters, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots "special": t ransportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) "specific": aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. the quality grade of nec semiconductor products is "standard" unless otherwise expressly specified in nec's data sheets or data books, etc. if cu stomers wish to use nec semiconductor products in applications not intended by nec, they must contact an nec sales representative in advance to determine nec's willingness to support a given application. (note) (1) "nec" as used in this statement means nec corporation and also includes its majority-owned subsidiaries. (2) "nec semiconductor products" means any semiconductor product developed or manufactured by or for nec (as defined above). ? ? ? ? ? ? |
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